Method for forming a capacitor of a semiconductor device

ABSTRACT

A capacitor having high capacitance using a silicon-containing conductive layer as a storage node, and a method for forming the same, are provided. The capacitor includes a storage node, an amorphous Al 2 O 3  dielectric layer, and a plate node. The amorphous Al 2 O 3  layer is formed by a method in which reactive vapor phase materials are supplied on the storage node, for example, an atomic layered deposition method. Also, the storage node is processed by rapid thermal nitridation before forming the amorphous Al 2 O 3  layer. The amorphous Al 2 O 3  layer is densified by annealing at approximately 850° C. after forming a plate node, to thereby realize the equivalent thickness of an oxide layer which approximates a theoretical value of 30 Å.

CROSS REFERENCE TO RELATED APPLICATIONS

This is a continuation of application Ser. No. 09/226,006, filed Jan. 6,1999, now U.S. Pat. No. 6,335,240 the entirety of which is incorporatedherein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a capacitor of a semiconductor device,and a method for forming the same.

2. Description of the Related Art

As semiconductor devices become more highly integrated, there is anecessity for reducing the area occupied by a capacitor, which in turncauses a reduction in the capacitance. To solve this problem, thestructure of the capacitor is changed or a material having a highdielectric constant is employed. For instance, a method has beenproposed for forming a capacitor using a Ta₂O₅ dielectric layer or a(Ba,Sr)TiO₃ (BST) dielectric layer having a dielectric constant higherthan that of an oxide/nitride/oxide (ONO) layer structure typically usedfor a dynamic random access memory (DRAM).

However, the process is complicated. The structure of a typicalcapacitor is a silicon/insulator/silicon (SIS) layer structure in whichpolycrystalline silicon layers doped with an impurity are used for plateand storage nodes. However, a metal/insulator/silicon (MIS) layer or ametal/insulator/metal (MIM) layer structure is required for the case ofusing the Ta₂O₅ layer, and the MIM layer structure is required for thecase of using the BST layer. That is, the structure of the capacitormust be changed.

If the Ta₂O₅ layer is used, then in order to overcome low step coverage,a layer must be formed using chemical vapor deposition (CVD) at a lowtemperature, which is a surface kinetic regime, and which may cause adeficiency in oxygen, leaving hydrocarbon residue in the layer ordeterioration in crystallization. Thus, the dielectric constant isreduced, and insulating properties are poor. Accordingly, to overcomethese problems, a dry O₂ annealing process at a high temperature isadditionally required. Also, there has been disclosed a method forcompensating for the insulating properties of the Ta₂O₅ layer by usingan oxide layer under the Ta₂O₅ layer generated by a dry annealingprocess (Y. Ohyi, “Ta₂O₅ Capacitor Dielectric Material for Giga-bitDRAMs”, IEDM Tech. Dig., 1994. p831).

Meanwhile, diffusion is easily caused by discontinuities in the atomicarrangement at a grain boundary. Thus, when a thick oxide layer isformed to compensate for the leakage current properties of the Ta₂O₅layer, diffusion of oxygen into the grain boundary is increased, tothereby oxidize a plate node. Accordingly, a reaction preventing layeris required between the Ta₂O₅ layer and the plate node of the capacitorto prevent reaction of the Ta₂O₅ layer with the plate node (U.S. Pat.No. 4,891,684).

In order to obtain excellent leakage current properties, a Schottkybarrier must be formed between a BST layer and an electrode. In order toform the Schottky barrier, an electrode should be formed of materialshaving a high work function, e.g., a metal (see Soon Oh Park,“Fabrication and Electrical Characterization of Pt/(Ba, Sr)TiO₃/PtCapacitors for Ultralarge-scale Integrated Dynamic Random Access MemoryApplications”, Jpn. J. Appl. Phys. Vol. 35, 1996, pp. 1548-1552). Inorder to employ the metal electrode, an ohmic contact must be formed atan interface between the metal electrode and the polycrystalline siliconlayer doped with an impurity. That is, an intermediate layer forming theohmic contact must be formed and a barrier layer must be employed.

The material layer of a high dielectric constant, such as the Ta₂O₅layer or the BST layer, requires a complicated process and structure,that is, a change of the structure of the capacitor to the MIM or MISstructure.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a capacitor of asemiconductor device, using a silicon-containing conductive layer as astorage node to increase capacitance.

It is another object to provide a method for forming a capacitor of asemiconductor device, using a silicon-containing conductive layer as astorage node to increase capacitance. Other and further objects willappear hereafter.

Accordingly, to achieve one objective, the capacitor of the presentinvention includes a storage node, a dielectric layer and a plate node.The storage node is a silicon-containing conductive layer such as apolycrystalline silicon layer doped with an impurity. Also, the storagenode has a three dimensional structure selected from the groupconsisting of a stack type, a hemispherical grained silicon layer typeand a cylinder type.

The dielectric layer is formed of amorphous Al₂O₃, on the storage node.Here, the amorphous Al₂O₃ layer is formed by transmitting vapor reactivematerials supplied by each source to the storage node in which reactionsare sequentially processed. The thickness of the dielectric layer is10˜300 Å using an atomic layered deposition method, and the thickness ofthe amorphous Al₂O₃ dielectric layer is 40˜70 Å. Also, a reactionpreventing layer is formed of one selected from the group consisting ofsilicon oxide, silicon nitride and silicon oxynitride layer.

The plate node is a conductive layer formed of polycrystalline silicondoped with impurities. Alternatively, the plate node is a conductivelayer formed of a refractory metal, a refractory metal silicide materialor a refractory metal nitride material. For example, the refractorymetal may be W, Mo, Ta, Ti or Cr. Also, the refractory metal silicidematerial is formed by silicidation of a refractory metal silicidematerial, such as Wsi₂, MoSi₂, TaSi₂ or TiSi₂, among others. Therefractory metal nitride material is formed by nitrification of arefractory metal, such as TiN.

To achieve another objective, a storage node is formed. The storage nodeis a polycrystalline silicon layer doped with an impurity, and thestorage node has a three-dimensional structure selected from the groupconsisting of a stack type, a hemispherical grained silicon layer typeand a cylinder type.

Then, a reaction preventing layer is formed on the storage node. Thereaction preventing layer is formed by annealing the storage node at300˜1200° C. In detail, a rapid thermal nitridation (RTN) process isperformed using a N₂ source such as NH₃ gas as an ambient gas atapproximately 900° C. Thus, the reaction preventing layer of the storagenode may be formed of silicon oxide (SiO₂), silicon nitride (SiN) orsilicon oxynitride (SiON).

Next, a dielectric layer is formed of an amorphous Al₂O₃ layer on thestorage node. The amorphous Al₂O₃ layer is formed to a thickness of10-300 Å by a method of supplying a reactive vapor phase material fromeach of several sources in sequence on a layer to be reacted with, i.e.,the storage node, in which reaction, that is, deposition is performed incycles, for instance, an atomic layer deposition (ALD) method.Preferably, the amorphous Al₂O₃ layer is formed to a thickness of 40-80Å. The atomic layer deposition method is performed using one selectedfrom the group consisting of Al(CH₃)₃ and AlCl₃ as an aluminum source,and the storage node is processed by hydrogen passivation treatmentbefore performing the atomic layered deposition.

Then, a plate electrode is formed on the dielectric layer. The platenode is a conductive layer formed of polycrystalline silicon doped withimpurities. Alternatively, the plate node is a conductive layer formedof a refractory metal, a refractory metal silicide material or arefractory metal nitride material. For example, the refractory metal maybe W, Mo, Ta, Ti or Cr. Also, the refractory metal silicide material isformed by silicidation of a refractory metal silicide material, such asWSi₂, MoSi₂, TaSi₂ or TiSi₂, among others. The refractory metal nitridematerial is formed by nitrification of a refractory metal, such as TiN.

Also, a primary densification is performed on the amorphous Al₂O₃dielectric layer, after the step of forming a plate node, by annealingthe amorphous Al₂O₃ dielectric layer at a temperature below thetemperature of crystallizing the amorphous Al₂O₃ layer, at 150-900° C.The annealing is performed using an ambient gas selected from the groupconsisting of O₂, NO and N₂ gas, or in a vacuum. Preferably, the primarydensification is performed at 850° C.

Also, a secondary densification is additionally performed on theamorphous Al₂O₃ dielectric layer, before the step of forming a platenode, by annealing the amorphous Al₂O₃ dielectric layer at a temperaturebelow the temperature of crystallizing the amorphous Al₂O₃ layer, at150-900° C., using an ambient gas selected from the group consisting ofO₂, NO and N₂ gas, or in a vacuum. Preferably, the annealing isperformed using O₂ as an ambient gas at approximately 450° C.

Accordingly, the silicon-containing conductive layer is used as thestorage node, and the capacitance can be increased.

BRIEF DESCRIPTION OF THE DRAWINGS

The above objectives and advantages of the present invention will becomemore apparent by describing in detail a preferred embodiment thereofwith reference to the attached drawings in which:

FIG. 1 is a sectional view of a capacitor according to an embodiment ofthe present invention;

FIGS. 2 through 4 are sectional views showing structures of a storagenode used for a capacitor according to embodiments of the presentinvention;

FIG. 5 is a sectional view for illustrating the step of forming thestorage node on a semiconductor substrate;

FIG. 6 is a sectional view for illustrating the step of forming adielectric layer on the storage node of FIG. 5;

FIG. 7 is a graph showing the relationship between the thickness of anequivalent oxide layer of an amorphous Al₂O₃ and applied drivingvoltage;

FIG. 8 is a graph showing leakage current density with respect to adrive voltage applied to a capacitor having an amorphous Al₂O₃ layer of60 Å; and

FIG. 9 is a graph showing electrical characteristics of a capacitoraccording to various condition variables during annealing atapproximately 450° C. after forming an amorphous Al₂O₃ layer.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention now will be described more fully hereinafter withreference to the accompanying drawings, in which preferred embodimentsof the invention are shown. This invention may, however, be embodied inmany different forms and should not be construed as limited to theembodiments set forth herein. Rather, these embodiments are provided sothat this disclosure will be thorough and complete, and will fullyconvey the scope of the invention to those skilled in the art. In thedrawings, the thickness of layers and regions are exaggerated forclarity. Like numbers refer to like elements throughout. It will also beunderstood that when a layer is referred to as being “on” another layeror substrate, it can be directly on the other layer or substrate, orintervening layers may also be present.

Referring to FIG. 1, a capacitor according to an embodiment of thepresent invention includes a storage node 200, a dielectric layer 400and a plate node 500. The storage node 200 is electrically connected toan active region of a semiconductor substrate 100 through a contact holeformed in an interlevel insulating layer 150 covering the semiconductorsubstrate 100. A silicon-containing conductive layer such as apolycrystalline silicon layer doped with an impurity is used for thestorage node 200.

An amorphous aluminum oxide Al₂O₃ layer is used for the dielectric layer400 covering the storage node 200. The Al₂O₃ layer has little differencein dielectric constant between its crystalline phase, such as α-Al₂O₃and γ-Al₂O₃, and its amorphous phase, and has a dielectric constant ofabout 10. However, the amorphous Al₂O₃ layer is more easily oxidizedthan silicon oxide, has a low permeability of alkali ions and excellentproperties. Also, the amorphous Al₂O₃ layer has a smooth morphology andhigh resistance to diffusion through a grain boundary, and thusdiffusion of oxygen through it can be suppressed.

The amorphous Al₂O₃ layer is formed by sequentially supplying a reactivevapor phase material from each of several sources on a layer, i.e., thestorage node. Particularly, a whole amorphous Al₂O₃ layer is obtained byrepeating the formation of thin films. For example, an atomic layerdeposition (ALD) method may be used.

By forming the amorphous Al₂O₃ layer using the ALD method, supplying insequence the reactive vapor phase materials on a layer where reactionfor forming the Al₂O₃ layer is performed, high conformity may beobtained and a step coverage may reach about 100%. Few impurities remainin the amorphous Al₂O₃ layer due to process properties of the ALDmethod. It has been known that an Al₂O₃ layer formed by sputtering haspoor step coverage and if the Al₂O₃ layer is formed by CVD, it isdifficult to remove remaining impurities and form a thin layer.Accordingly, in a preferred embodiment, the amorphous Al₂O₃ layer isformed by the ALD method, and thus has high step coverage and a moreamorphous state. The amorphous Al₂O₃ layer is formed to a thickness of10-300 Å, preferably 40-80 Å.

Also, a reaction preventing layer 300 of silicon oxide (SiO₂), siliconnitride (SiN) or silicon oxynitride (SiON) may be further formed betweenthe storage node 200 and the dielectric layer 400. However, since theamorphous Al₂O₃ layer has low diffusivity of oxygen, the reactionpreventing layer 300 can be omitted. The plate node 500 formed on thedielectric layer 400 is formed of a conductive layer formed of apolycrystalline silicon doped with impurities. Alternatively, the plate500 is formed of a conductive layer formed of a refractory metal, arefractory metal silicide material or a refractory metal nitridematerial. For example, the refractory metal may be W, Mo, Ta, Ti or Cr.Also, the refractory metal silicide material is formed by silicidationof a refractory metal silicide material, such as WSi₂, MoSi₂, TaSi₂ orTiSi₂, among others. The refractory metal nitride material is formed bynitrification of a refractory metal, such as TiN.

Meanwhile, the structures of a storage node of the capacitor may beformed in a variety of three-dimension structures. For instance, a stacktype storage node 200 as shown in FIG. 1, can be adopted to thecapacitor structure. Alternatively, a hemispherical grained silicon(HGS) layer may be formed on a surface of an electrode as shown in FIG.2, so that the storage node 200 a has the HGS structure, which increasesthe surface area due to its irregularity. Other structures may be used,such as a cylinder type storage electrode 200 b as shown in FIG. 3, or astorage node 200 c as shown in FIG. 4 in which the hemispherical grainedsilicon layer is formed on the surface of the cylinder type electrode toincrease the surface area. Even though three-dimensional storage nodessuch as 200, 200 a, 200 b and 200 c are employed, a high conformity canbe realized in the amorphous Al₂O₃ layer when the amorphous Al₂O₃ isformed by the ALD process. The high conformity avoids problems such aspoor step coverage. Although preferred embodiment storage nodes 200, 200a, 200 b and 200 c are illustrated, other structures are possible aswould be well known to one skilled in the art.

Referring to FIG. 5, a storage node 200 is formed on a semiconductorsubstrate 100 where an interlevel insulating layer 150 is formed. Thestorage node 200 in the present embodiment may be shaped in athree-dimensional form such as a hemispherical grained silicon layertype or a cylinder type as described with respect to FIGS. 2 through 4,instead of the stack type. Also, the storage node 200 is formed of aconductive layer of a silicon group, such as a polycrystalline siliconlayer doped with an impurity.

Then, the storage node 200 may be annealed by a rapid thermal process(RTP), to thereby additionally form a reaction preventing layer 300covering the storage electrode 200. The annealing is performed at300-1200° C., preferably 900° C., using an NH₃ gas as a nitrogen sourcefor 60 sec, i.e., through rapid thermal nitridation (RTN). Through theannealing, the silicon of the storage node 200 reacts with nitrogen, tothereby form a SiN layer used as a reaction preventing layer 300. Also,a silicon oxide or silicon oxynitride layer may be used instead of thesilicon nitride layer for the reaction preventing layer 300.

The reaction preventing layer 300 more completely prevents oxygen frombeing diffused into the storage node 200 during the annealing process,which is performed later, using an ambient gas of oxygen. That is, theequivalent thickness (ET) of an oxide layer can be prevented fromincreasing due to diffusion of oxygen. However the silicon nitride layerneed not be formed by the RTP. This is because low oxygen diffusivity ismaintained by the Al₂O₃ layer.

Referring to FIG. 6, a native oxide layer remaining on the storage node200 is completely removed through hydrogen passivation treatment.

Then, the amorphous Al₂O₃ layer is formed on the storage node 200 by amethod in which each reactive vapor phase material from several sourcesis supplied step by step onto the storage node 200. This may be achievedin various ways, particularly by the ALD method. By the ALD method, analuminum (Al) layer is formed on the storage node 200 using an aluminumsource, to a degree of atomic sized thickness. Then, the Al layer isoxidized with an oxidation agent to form an Al₂O₃ layer having anatomic-sized thickness, i.e., approximately 0.5-50 Å. Subsequently, thestep of forming the Al₂O₃ layer having an atomic-sized thickness isperformed in cycles, to thereby form an amorphous Al₂O₃ layer of 10-300Å. Preferably, the amorphous Al₂O₃ layer is formed to a thickness of40-80 Å.

Specifically, Al(CH₃)₃ or AlCl₃, preferably Al(CH₃)_(3,) is used as analuminum source. Preferably, vaporized H₂O is used as the oxidationagent. When the step of oxidizing the Al layer using the oxidation agentis performed, the temperature of the semiconductor substrate 100 is150-400° C., preferably approximately 350° C. Also, the amorphous Al₂O₃layer is grown to a thickness of approximately 2 Å by each cycle. Theamorphous phase of the amorphous Al₂O₃ layer is realized according tocharacteristics of the ALD process. Also, the Al₂O₃ layer has highconformity according to the characteristics of the ALD. Thus, a stepcoverage of approximately 100% can be realized.

Then, a plate electrode 500 as shown in FIG. 1 is formed on thedielectric layer 400. The plate electrode 500 is formed of a conductivelayer formed of a polycrystalline silicon doped with impurities.Alternatively, the plate electrode 500 is formed of a conductive layerformed of a refractory metal, a refractory metal silicide material or arefractory metal nitride material. For example, the refractory metal mayby W, Mo, Ta, Ti or Cr. Also, the refractory metal silicide material isformed by silicidation of a refractory metal silicide material, such asWSi₂, MoSi₂, TaSi₂ or TiSi₂, among others. The refractory metal nitridematerial is formed by nitrification of a refractory metal, such as TiN.

The grown amorphous Al₂O₃ layer has a refractivity of approximately1.64λ, where λ=633.0 nm. The amorphous Al₂O₃ layer can be densifiedthrough a subsequent annealing process. The degree of densification canbe evaluated by measuring the refractivity and the thickness of thelayer. That is, the amorphous Al₂O₃ layer is grown, and then annealedunder an O₂ ambient gas, after that the refractivity of the annealedAl₂O₃ layer is measured to estimate the degree of the densification.

TABLE 1 Characteristics before and after growing Al₂O₃ layerRefractivity (λ = 633.0 nm) After growing 1.64 After annealing 1.692(about 800° C., O₂, for 30 min)

As shown in Table 1, the refractivity of the amorphous Al₂O₃ layer isincreased, through O₂ annealing, which leads to densification of theamorphous Al₂O₃ layer. Thus, the dielectric constant of the amorphousAl₂O₃ layer is increased, so that the equivalent thickness (ET) of anoxide is minimized.

To show how the amorphous Al₂O₃ layer suppresses O₂ diffusion, thicknessof the SiO₂ layer formed on a bare wafer was measured as a function ofthe thickness of a layer of Al₂O₃ formed on the wafer. That is, anamorphous Al₂O₃ layer having various thicknesses was formed on a barewafer. The wafer was treated with standard cleaners I and HF, and thenthe amorphous Al₂O₃ layer was annealed under an O₂ ambient gas atapproximately 800° C. Then, the thickness of the formed SiO₂ layer wasmeasured using a spectroscopic elipsometer. The results are shown inTable 2.

As shown in Table 2, if the amorphous Al₂O₃ layer is not formed, theSiO₂ layer is grown to approximately 66.6 Å. If an amorphous Al₂O₃ layeris employed, the thickness of the SiO₂ layer is abruptly reduced. If theamorphous Al₂O₃ layer of approximately 100 Å is employed, the SiO₂ layeris reduced to a thickness of approximately 2 Å. As described above, theamorphous Al₂O₃ layer of the present embodiment suppresses O₂ diffusion,so that excellent capacitor properties can be realized even without thereaction preventing layer 300 being formed through the RTP. However, thereaction preventing layer 300 may be employed to completely prevent O₂diffusion during a subsequent process of annealing.

TABLE 2 Thickness of SiO₂ layer -vs- thickness of Al₂O₃ layer Thicknessof Al₂O₃ after annealing (Å) Thickness of SiO₂ (Å) 0 66.576 28.86017.032 33.369 18.959 48.484 11.222 82.283 3.406 98.711 2.002 258.7491.542

In order to increase the dielectric constant, a primary densification isperformed on the amorphous Al₂O₃ layer, through annealing. Thisannealing for densification can be performed at any time after formingthe amorphous Al₂O₃ layer, preferably after forming the plate node 500.The annealing is performed at approximately 150-900° C., preferably 850°C., which is lower than the crystallization temperature of the amorphousAl₂O₃ layer, using O₂ gas, NO gas or N₂ gas as an ambient gas, or in avacuum. Preferably, the annealing is performed in the ambient gas of N₂for approximately 30 min.

The amorphous Al₂O₃ layer gives an ET value which approximates, forinstance, a theoretical ET value of about 26 Å, when the thickness ofthe amorphous Al₂O₃ layer is about 60 Å, and the dielectric constant ofthe Al₂O₃ is assumed to be 9. However, the annealing can be furtherperformed to realize a value even more closely approximating thetheoretical ET value. That is, a secondary densification is performedthrough annealing immediately after forming the amorphous Al₂O₃ layer,and this is a pretreatment for the primary densification.

Here, the secondary densification is performed at 150-900° C.,preferably 450° C., which is lower than the crystallization temperatureof the amorphous Al₂O₃ layer, using O₂ gas, NO gas or N₂ gas as anambient gas, or in a vacuum. Preferably, the secondary densification isperformed by annealing in the ambient gas of O₂ for about 30 min.

Table 3 shows various electric characteristics measured under variousconditions in order to illustrate the effect of the secondarydensification. That is, the storage node 200 is formed from apolycrystalline silicon layer on a semiconductor substrate 100, theamorphous Al₂O₃ layer is formed, and electrical properties of thecapacitor are measured. Table 3 contains the results of tenmeasurements, showing the effects when the RTN process of NH₃ isperformed at 900° C. for 60 sec or not performed, the amorphous Al₂O₃layer is formed to 60 Å or 300 Å, and the secondary densification isperformed using O₂ at approximately 450° C. for 30 min, at approximately800° C. for 30 min, or not performed.

As shown in Table 3, the Al₂O₃ layer of about 300 Å has a leakagecurrent density of 20 nA/cm² or less, regardless of other conditions.

However, the leakage current of the Al₂O₃ layer of about 60 Å is changedby other conditions. For example, in the case No. 7 of the Al₂O₃ layerof 60 Å without RTN, and with the secondary densification at 800° C.,the ET is approximately 57 Å, which is the greatest for all cases wherethe thickness of the Al₂O₃ layer is 60 Å. Also, for example, in case No.1 with the RTN process, the ET is approximately 47 Å, which is more thanthe theoretical ET value 30 Å (i.e., an RTN layer of 4 Å+an Al₂O₃ layerof 26 Å). This means that the equivalent oxide layer has grown.

Moreover, in case No. 3 when the Al₂O₃ layer of 60 Å thick, thetemperature of the secondary densification is 450° C., and the RTN isperformed, the ET is 40 Å, and in the case No. 6 when the Al₂O₃ layer is60 Å thick, the secondary densification temperature is 450° C. and theRTN process is not performed, the ET is 37 Å. However, in the case No.6, the leakage current density of approximately 700 nA/cm² is higher incomparison to approximately 45 nA/cm² in the case No. 3.

From these results, we note that the electric characteristics of acapacitor are excellent in the case of performing secondarydensification at 450° C. as, for example, in case No. 3. Also, if thereaction preventing layer 300 such as a SiN₂ layer, a SiO₂ layer or aSiON layer is formed through annealing such as RTN, between the storagenode 200 and the dielectric layer 400, the electrical characteristics ofthe capacitor are enhanced.

TABLE 3 Electric characteristics of capacitor as a function of secondarydensification Thickness Thickness Tempera- leakage of of ture of O₂Capacitance current equivalent C_(min)/ Al₂O₃ secondary (pF) densityoxide layer C_(max) No. RTN layer (Å) densification C_(min) C_(max) tanδ (nA/cm²) (ET)(Å) (%) 1 yes 60 800 615 661 0.012 25.8 47 93 2 300 800235 247 0.031 ≦20 125 95 3 60 450 718 772 0.009 45.77 40 93 4 300 450259 263 0.042 ≦20 117 98 5 300 — 218 229 0.045 ≦20 135 95 6 no 60 450766 832 0.06 704.38 37 92 7 60 800 535 546 0.014 37.32 57 98 8 300 450248 252 0.019 ≦20 117 98 9 300 — 210 219 0.052 ≦20 141 96 10 300 800 222223 0.046 ≦20 138 99

As described above, when the amorphous Al₂O₃ layer is employed as thedielectric layer 400 and the secondary densification is performed, theelectrical characteristics of the capacitor are enhanced. However, theET values realized under the above conditions do not reach thetheoretical value of 30 Å. Thus, the effect of performing the primarydensification after forming the plate node 500 will be described. Thatis, the plate node 500 is formed under conditions as shown in Table 3and then annealed at approximately 850° C. for 30 min using an ambientgas of N₂, for a primary densification, and then the electricalcharacteristics of the capacitor are measured for the ten differentprocess conditions of Table 3.

Table 4 shows the results of these measurements. In Table 4, ‘C’, ‘B’,‘T’, ‘L’ and ‘R’ indicate center, bottom, top, left and right portionsof a wafer, respectively. The primary densification can reduce the ETvalues for all cases as shown in Table 4. In the case that the Al₂O₃layer is annealed at approximately 450° C. during the secondarydensification process and RTN is performed (No. 3-C), the ET value is 35Å. In the case where the other conditions are the same as that of No.3-C, but the RTN process is not performed (No. 6-C), the ET value is 31Å. Both results approximate to the theoretical value of 30 Å. Thus,these results show that the secondary densification of the amorphousAl₂O₃ layer further increases capacitance.

TABLE 4 Electrical characteristics of capacitor depending on primarydensification Tempera- Thickness Postion Thickness ture of O₂ Leakage ofC_(min)/ of of secondary Capacitance current Equivalent C_(max)semiconductor Al₂O₃ densification (pF) density oxide layer (%; ± No. RTNsubstrate layer (Å) (° C.) C_(min) C_(max) tan δ (nA/cm²) (ET; Å) 2V) 1yes C 60 800 680 690 0.012 7.96 44.8 98.6 2 C 300 800 250 270 0.019 15.2118.3 92.6 3 T 60 450 830 874 0.014 68.4 35.07 95 C 840 890 0.028 28.634.89 94.4 B 830 876 0.032 25.6 35.31 94.7 L 825 859 0.035 53.6 36.02 96R 840 882 0.014 65.4 35.07 95.2 4 C 300 450 270 290 0.017 16.5 110 93.15 C 300 — 260 270 0.017 13.1 116.1 96.3 6 no T 60 450 932 987 0.019 —31.34 94.4 C 930 990 0.017 677 31.30 94.4 B 905 946 0.011 — 32.71 95.7 L925 971 0.014 — 31.86 95.3 R 910 964 0.016 — 32.09 94.4 7 C 60 800 540580 0.018 2.29 53.4 93.1 8 C 300 450 310 313 0.018 13.3 98.8 99 9 C 300— 250 260 0.02  4.89 119.8 96.2 10 C 60 800 230 240 0.02  11.2 133.595.8

FIG. 7 shows the ET at the amorphous Al₂O₃ layer of 60 Å in Table 4, asa function of an applied voltage. That is, reference numerals 710, 715,730 and 735 indicate ET values for the cases No. 1, No. 7, No. 3 and No.6 respectively of Table 4, as a function of applied voltage. As shown inFIG. 7, if the secondary densification using O₂ is performed at 450° C.for 30 min and the primary densification of N₂ is performed at 850° C.for 30 min (730 and 735), i.e., in the cases No. 3 and No. 6 of Table 4,the measured ET values approximate the theoretical ET value of 30 Å.

Referring to FIG. 8, reference numerals 810, 815, 830 and 835 indicateleakage current densities for the cases No. 7, No. 1, No. 6 and No. 3respectively of Table 4, as a function of applied voltage. As shown inFIG. 8, among the cases 730 and 735 approximating the theoretical ETvalue as illustrated in FIG. 7, i.e., in the cases No. 3 and No. 4 ofTable 4, case No. 3 exhibits a lower leakage current density at drivingvoltages of 2 V or less. Thus, if the secondary densification with O₂ isperformed at approximately 450° C. for 30 min according to theconditions of case No. 3 of Table 4, i.e., after the RTN process, andthe primary densification with N₂ is performed at 850° C. for 30 min,then the electrical characteristics of the capacitor are excellent.

The effect of the secondary densification will be described as follows.The temperature for the secondary densification is set to 450° C., whichcan produce excellent electrical characteristics of a capacitor asdescribed above. Also, whether the ambient gas for the secondarydensification is a gas other than O₂, (i.e., N₂), or whether thesecondary densification is performed, are set as variables. The time forthe secondary densification and the thickness of the amorphous Al₂O₃layer are also set as variables. The ET value and the leakage currentdensity are measured as these variables are changed. The conditions areshown in Table 5.

TABLE 5 Time for Reference Thickness of Al₂O₃ secondary numeral layer(Å) Ambient gas densification (min) 910 40 N₂ 10 920 50 O₂ 10 930 50 O₂30 940 50 N₂ 10 950 60 O₂ 10 960 60 O₂ 30 970 60 N₂ 10 980 60 none  0

FIG. 9 shows the ET and leakage currents for the various conditionsshown in Table 5. Reference numeral 940 represents the lowest ET and thehighest leakage current density. However, reference numerals 950, 960,970 and 980, for an amorphous Al₂O₃ layer of approximately 60 Å,represent ETs and leakage current densities which are similar to eachother. Also, as the amorphous Al₂O₃ layer is closer to 40 Å (910), theET values are similar and the leakage current density is increased.Thus, in the amorphous Al₂O₃ layer of approximately 60 Å, the propertiesof capacitor change little without regard to whether the secondarydensification is performed or not, to what ambient gas is used, or tochanges in secondary densification time. This means that the secondarydensification is not always a required step. In other words, thesecondary densification is for compensating for the primarydensification. Even through the plate node 500 is formed on thedielectric layer 400 without the secondary densification, a capacitorhaving excellent characteristics can be realized. That is, when theamorphous Al₂O₃ layer and the plate node 500 are formed after an RTNprocess of the storage node 200, and then the primary densificationusing N₂ at approximately 850° C. for 30 min is performed, theelectrical characteristics of the capacitor are excellent.

Accordingly, the amorphous Al₂O₃ dielectric layer is formed on thestorage node using a method for supplying each reactive vapor phasematerial from several sources on a layer i.e., the storage node, where areaction, e.g., deposition, is performed, in cycles, e.g., ALD method.During forming the amorphous Al₂O₃ layer, the amorphous phase can berealized using the method for supplying reactive vapor phase materialson a layer where a reaction is performed in cycles. Also, by such amethod, no impurity remains in the amorphous Al₂O₃ layer. The amorphousAl₂O₃ layer has a low O₂ diffusivity. Thus, when a conductive layer ofthe silicon group is employed as the storage node, it is possible toprevent the equivalent oxide layer from growing excessively. That is, acapacitor of the SIS structure can be realized, like in the capacitor ofthe ONO structure, to thereby overcome difficulties due to a change ofthe structure of the capacitor to the MIS structure or MIM structure.

Also, an amorphous Al₂O₃ layer having a smooth morphology and highconformity can realize a step coverage of approximately 100%. Thus, thestorage node can be formed as a cylinder type, an HSG type or a stacktype, to thereby increase capacitance. The amorphous Al₂O₃ layer has adielectric constant equivalent to that of an aluminum layer of acrystalline phase, to thereby realize high capacitance.

After forming the plate node on the amorphous Al₂O₃ layer, the amorphousAl₂O₃ layer can be densified by annealing at a temperature below thetemperature of crystallizing the Al₂O₃, e.g., at approximately 850° C.The densification reduces the thickness of the amorphous Al₂O₃ layer andincreases the refractivity. That is, the dielectric constant of theamorphous Al₂O₃ layer is increased. Also, the thickness of theequivalent oxide layer is reduced, so that a thickness approximating thetheoretical ET value, e.g., approximately 30 Å, can be realized, tothereby increase capacitance.

A reaction preventing layer can be formed between the amorphous Al₂O₃layer and the storage node, in order to reduce the thickness of theequivalent oxide layer and help the capacitor operate stably. Asecondary densification may be additionally performed to compensate forthe step of densifying the amorphous Al₂O₃ layer, so that the thicknessof the equivalent oxide layer approximates the theorectical ET value, tothereby increase capacitance.

Preferred embodiments of the invention have been disclosed in thedrawings and specification, and although specific terms are employed,they are used in a descriptive sense only and not for purposes oflimitation. The scope of the invention is set forth in the followingclaims.

What is claimed is:
 1. A method for forming a capacitor of asemiconductor device, comprising: (a) forming a storage node; (b)forming a dielectric layer of amorphous Al₂O₃ on the storage node,wherein the amorphous Al₂O₃ is formed by ALD (Atomic Layer Deposition)using a tri-methyl aluminum (Al(CH₃)₃) source and an oxidative source;and (c) forming a plate node on the dielectric layer.
 2. The method ofclaim 1, wherein the storage node is a polycrystalline silicon layerdoped with an impurity.
 3. The method of claim 1, wherein the storagenode has a three-dimensional structure selected from the groupconsisting of a stack type, a hemispherical grained silicon layer typeand a cylinder type.
 4. The method of claim 1, further comprisingforming a reaction preventing layer on the storage node, before offorming the dielectric layer.
 5. The method of claim 4, wherein thereaction preventing layer is formed of one selected from the groupconsisting of silicon oxide, silicon nitride and silicon oxynitridelayer.
 6. The method of claim 4, wherein the reaction preventing layeris formed by annealing the storage node at 300-1200° C.
 7. The method ofclaim 6, wherein the annealing is performed by a rapid thermal processin an ambient N₂ source gas.
 8. The method of claim 1, wherein theamorphous Al₂O₃ dielectric layer is formed to have a thickness of 10-300Å.
 9. The method of claim 8, wherein the amorphous Al₂O₃ dielectriclayer is formed to have a thickness of 40-80 Å.
 10. The method of claim1, wherein the storage node is processed by hydrogen passivationtreatment before performing the atomic layered deposition.
 11. Themethod of claim 1, wherein a primary densification is performed on theamorphous Al₂O₃ dielectric layer, after forming the plate node.
 12. Themethod of claim 11, wherein the primary densification is performed byannealing the amorphous Al₂O₃ dielectric layer at a temperature belowthe temperature of crystallizing the amorphous Al₂O₃ layer.
 13. Themethod of claim 12, wherein the primary densification is performed at150-900° C.
 14. The method of claim 13, wherein the primarydensification is performed at 850° C.
 15. The method of claim 12,wherein the annealing is performed using an ambient gas selected fromthe group consisting of O₂, NO and N₂ gas, or in a vacuum.
 16. Themethod of claim 11, wherein a secondary densification is additionallyperformed on the amorphous Al₂O₃ dielectric layer, before forming aplate node.
 17. The method of claim 16, wherein the secondarydensification is performed by annealing the amorphous Al₂O₃ dielectriclayer at a temperature below the temperature of crystallizing theamorphous Al₂O₃ layer.
 18. The method of claim 17, wherein the secondarydensification is performed at 150-900° C.
 19. The method of claim 17,wherein the secondary densification is performed using an ambient gasselected from the group consisting of O₂, NO and N₂ gas, or in a vacuum.20. The method of claim 1, wherein the plate node is a conductive layerconsisting of one of a refractory metal, a refractory metal silicidematerial, a refractory metal nitride material and a polycrystallinesilicon doped with impurities, in which the refractory metal is oneselected from the group consisting of W, Mo, Ta, Ti and Cr.